EP94D1

Part Number:EP94D1

Overview

EP94D1 is an HDMI 1.4 transceiver combo with embedded OSD Generator. The chip supports embedded OSD Generator, 1 digital audio/video input ports (AV port), 1 HDMI input port and 1 HDMI output port.

For the HDMI output port, the source can be selected among the embedded OSD Generator, the digital audio/video input from AV port or HDMI RX. The chip is compliant with HDMI 1.4b and supports SD/HD Audio, Full HD Video in 16-bit Deep Color, Full 3D Video and 4K2K video (300 Mhz TMDS clock).

Features

•HDMI 1.4b compliant
•HDCP 1.4 compliant
•Support SD/HD Audio, Full HD Video in 16-bit Deep Color, Full 3D Video and 4K2K video (300 Mhz TMDS clock)
•Support 8 bit digital video input, 8/10/12-bit video output in AV port
•Support 2-channel IIS audio input in AV port
•Support Muxed 8-bit YUV422 format input in AV port.
•Support CCIR656 (Embedded Sync) or CCIR601 (Separate Sync) Video Input
•Programmable Single/Dual Edge Clocking Mode in digital video input in AV port
•Supports input De-Skewing in digital video input in AV port
•Support YCC422 to YCC444 conversion in AV port
•Support YCC to RGB conversion in ITU-R BT.601 and 709 color space in AV port
•Support auto-send for AVI, ADO, ACR (Audio Clock Regeneration) and General Control packets in AV port.
•Programmable DE generation in AV port
•Support x2, x4 and x8 Pixel Repetition in AV port
•Support audio down sampling at 1/2, 1/3 or 1/4 sampling rate in AV port
•Support 12 OSD Windows with 128 24-bit X 16-bit, 102 24-bit X 20-bit or 85 24-bit X 24-bit configurable Font RAM and 1024 words Display RAM
•Support 8-color pallet for OSD foreground and each color pallet has 32768 RGB color
•Support OSD Overlay with Active Video in 8-bits video input
•Support 1 HDMI RX Port and TX Port
•Support the HDCP cipher engine for the HDMI Output Port
•Support Receiver Connection Detection for the HDMI Output Port
•Register-programmable via slave IIC interface
•Support Link On and Valid DE Detection for the HDMI RX Port
•Low stand-by current at power down mode
•64-pin LQFP package

Block Diagram